The ultimate goal of high quality research work is to solve important problems and impact the real world. Intel's Developer Relations Division for EMEA has recently recognized CSE, with collaborators from Iowa State University, for making significant contributions to advance multicore technology with their algorithms and software. The Intel Software and Service Group (SSG) is using a software cache partitioning method developed by the collaborative team of Drs. Jiang Lin1, Qingda Lu2, Xiaoning Ding3, Zhao Zhang4, Xiaodong Zhang5, and P. Sadayappan6.
Performance degradation caused by access conflicts in shared caches has been a major concern for data intensive applications running on multi-core processors. This team's work makes a strong case for using a software solution implemented in the Linux kernel to effectively manage shared hardware caches in multi-core processors. In a letter of acknowledgement, Wolfgang Petersen, Director of Developer Relations, informed the co-authors their research contributions "helped our engineers implement a solution that provided 1.5X latency reduction in a custom Linux stack running on multi-core Intel platforms." According to Intel SSG, the software cache partitioning method "has been adopted by a major industrial automation vendor and facilitated the deployment on multi-core Intel platforms".
"I am very pleased to learn that another research work of ours has made a strong impact in the advancement of computer systems," states Xiaodong Zhang. "I believe the solution presented in this work is not only effective in Linux system for Intel processors, but also general-purpose, which will be widely used as a critical component in any operating system to manage shared caches in any multi-core processors." Several published research results on memory systems from his group have been widely adopted in both commercial processors, such as AMD, Intel, NVADIA, and Sun Microsystems, and major software systems, such as Linux, NetBSD, and MySQL.The paper summarizing the research, entitled "Gaining Insights Into Multi-core Cache Partitioning: Bridging the Gap Between Simulation and Real Systems," was presented and published at the 14th International Symposium and on High Performance Architecture (HPCA'08).
Jiang Lin (ECE Ph.D.'08, Iowa State)