"LDPC-in-SSD: making advanced error correction codes work effectively  
in solid state drives",

Kai Zhao, Wenzhe Zhao, Hongbin Sun, Tong Zhang, Xiaodong Zhang, Nanning Zheng 

Proceedings of 11th USENIX Conference on File and Storage Technologies  
(FAST'13), San Jose, California, February 12-15, 2013.


Conventional error correction codes (ECCs), such as the
commonly used BCH code, have become increasingly
inadequate for solid state drives (SSDs) as the capacity
of NAND flash memory continues to increase and
its reliability continues to degrade. It is highly desirable
to deploy a much more powerful ECC, such as low density
parity-check (LDPC) code, to significantly improve
the reliability of SSDs. Although LDPC code has
had its success in commercial hard disk drives, to fully
exploit its error correction capability in SSDs demands
unconventional fine-grained flash memory sensing, leading
to an increased memory read latency. To address
this important but largely unexplored issue, this paper
presents three techniques to mitigate the LDPC-induced
response time delay so that SSDs can benefit its strong
error correction capability to the full extent. We quantitatively
evaluate these techniques by carrying out tracebased
SSD simulations with runtime characterization of
NAND flash memory reliability and LDPC code decoding.
Our study based on intensive experiments shows
that these techniques used in an integrated way in SSDs
can reduce the worst-case system read response time delay
from over 100% down to below 20%. With our proposed
techniques, a strong ECC alternative can be used
in NAND flash memory to retain its reliability to respond
the continuous cost reduction, and its relatively small
increase of response time delay is acceptable to mainstream
application users, considering a huge gain in SSD
capacity, its reliability, and the price reduction.