*new* Workshop program is now available.
Near-threshold computing (NTC) has emerged as a promising approach to achieving an order of magnitude improvement in energy efficiency of microprocessors. The key feature of NTC is to lower the supply voltage of chips to a value only slightly higher than the threshold voltage. NTC lowers power consumption by an order of magnitude or more. The reduction in power however comes with associated costs and challenges that include low operating frequency, less reliable operation of both logic and memory and much higher sensitivity to parameter variability. Industry is actively investigating the technology and has produced prototypes that show promising initial results. However, many challenges remain before NTC can become mainstream.
This workshop seeks original contributions on topics that include, but are not limited to:
- Software/Architecture/Circuit solutions for addressing performance, reliability or variability challenges in NTC.
- Approximate computing techniques that gracefully tolerate reliability issues at low voltages.
- Novel applications of NTC in mobile systems, high-performance/high-parallelism environments.
- Tradeoff analyses and performance/energy studies that help identify new application domains for NTC.
- Other low-voltage techniques, designs, architectures.
Call for papers (pdf)
Radu Teodorescu (The Ohio State University), (email)
Nam Sung Kim (University of Wisconsin), (email)
Ulya Karpuzcu (University of Minnesota), (email)
Paper submission: April 18, 2014.
Acceptance notifications: May 2, 2014.
Camera-ready due: June 1, 2014.
Workshop: Saturday, June 14, 2014.
Alaa Alameldeen, Intel
Yasuko Eckert, AMD
Ron Dreslinski, University of Michigan
Ulya Karpuzcu, University of Minnesota
Nam Sung Kim, University of Wisconsin
Srilatha Manne, AMD
Timothy Miller, Binghamton University
Trevor Mudge, University of Michigan
Radu Teodorescu, Ohio State
Josep Torrellas, University of Illinois
Sungjoo Yoo, POSTECH