CIS 778: Computer Aided Design and Analysis of VLSI Circuits


Description

VLSI design methodology; specification of VLSI circuits at various levels of abstraction; design, layout and computer simulation of circuits; high-level synthesis; design projects.

Level, Credits, Class Time Distribution, Prerequisites

Level Credits Class Time Distribution Prerequisites
U G 4 Three one-hour lectures CIS 560; EE 561; CIS 675 or EE 562

Quarters Offered, General Information, Exclusions, Cross-Listings, etc.

Objectives

Relationship to ABET Criterion 3 Relationship to CSE Program Objectives
a b c d e f g h i j k
XX XX XXX ? XX ? XX   XX   XXX
1a 1b 1c 2a 2b 3a 3b 3c 4a 4b
XXX XXX XX   ?? XX   X XXX XX

Texts




Topics

No. of Wks. Topics
1 CMOS Circuits
2 Switch level logic simulation using IRSIM
1 CMOS device characteristics; CMOS process technology
1 CMOS layout using MAGIC
2 First-order timing models; Transistor sizing
1 CMOS storage elements; Clocked circuits: Dynamic logic
1 Hardware Description Languages; Verilog
1 CMOS sub-system examples

Grading Plan

Lab Assignments &
Homeworks
20%
Design Projects30%
Midterm 20%
Final 30%

Preparer Information and Date: Syllabus prepared by P. Sadayappan, last modified March 31, 1999.