TR-99-2.ps.Z

The impact of memory hierarchies on cluster computing  

X. Du and X. Zhang     

Proceedings of the Second Merged Symposium IPPS/SPDP'99, 
April, 1999, pp. 61-69.  
 
Abstract
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Using off-the-shelf commodity workstations and PCs to
build a cluster for parallel computing has become a common practice. 
A choice of a cost-effective cluster computing platform for a given 
budget and for certain types of application workloads is mainly determined
by its memory hierarchy and interconnection network of the cluster.
Finding such a solution from exhaustive simulations would be
highly time-consuming and expensive; and predictions from
measurements on existing clusters would be impractical. We present
an analytical model for evaluating performance impact of
memory hierarchies and networks on cluster computing. The model
covers the memory hierarchy of a single SMP, a cluster of workstations/PCs, 
or a cluster of SMPs by changing various modeling and architectural 
parameters. Network variations covering bus and switch networks
are also included in the analysis. Applications of different types are
characterized by parameterized workloads with different computation and
communication requirements. The model has been validated by simulations.
Our study shows that the length of memory hieararchy is the most sensitive
factor to minimize the execution time for many types of workloads.
However, the interconnection
network cost of a tightly coupled system with a short length of memory
hierarchy, such as a SMP is significantly more
expensive than a normal cluster network connecting independent computer nodes.
Thus, the essential issue to be considered is the trade-off 
between the length of memory hierarchy and system cost.
Based on analytical and case studies, we present our quantitative  
recommendations for building cost-effective clusters for different 
application workloads.